PICs are popular with
both industrial developers and hobbyists alike due to their low cost, wide
availability, large user base, extensive collection of application notes,
availability of low cost or free development tools, and serial programming (and
re-programming with flash memory) capability. They are also commonly used in
educational programming as they often come with the easy to use 'pic logicator'
software.
Contents
Various older (EPROM) PIC microcontrollers
The original PIC was
built to be used with General Instrument's new 16-bit CPU, the CP1600. While generally a
good CPU, the CP1600 had
poor I/Operformance, and the 8-bit PIC was developed in 1975 to improve
performance of the overall system by offloading I/O tasks from the CPU. The PIC
used simple microcode stored in ROM to perform its
tasks, and although the term was not used at the time, it shares some common
features withRISC designs.
In 1985, General
Instrument spun off their microelectronics division and
the new ownership cancelled almost everything — which by this time was mostly
out-of-date. The PIC, however, was upgraded with internal EPROM to produce a
programmable channel controller and today a huge variety of PICs
are available with various on-board peripherals (serial communication modules, UARTs, motor control
kernels, etc.) and program memory from 256 words to 64k words and more (a
"word" is one assembly language instruction, varying from 12, 14 or
16 bits depending on
the specific PIC microfamily).
PIC and PICmicro are
registered trademarks of Microchip Technology. It is generally thought that PIC
stands for Peripheral Interface Controller, although General
Instruments' original acronym for the initial PIC1640 and PIC1650 devices was
"Programmable Interface Controller" The acronym was
quickly replaced with "Programmable Intelligent Computer"
The Microchip 16C84 (PIC16x84), introduced in
1993, was the first[citation needed] Microchip
CPU with on-chip EEPROM memory. This electrically erasable memory made it cost
less than CPUs that required a quartz "erase window" for erasing
EPROM.
The PIC architecture
is characterized by its multiple attributes:
·
A small number of fixed length instructions
·
Most instructions are single cycle execution (2 clock cycles, or 4
clock cycles in 8-bit models), with one delay cycle on branches and skips
·
One accumulator (W0), the use of which (as source
operand) is implied (i.e. is not encoded in the opcode)
·
All RAM locations function as registers as both source and/or
destination of math and other functions.[6]
·
A hardware stack for storing return addresses
·
A small amount of addressable data space (32, 128, or 256 bytes,
depending on the family), extended through banking
·
Data space mapped CPU, port, and peripheral registers
·
ALU status flags are mapped into the data space
·
The program counter is also mapped into the data space and
writable (this is used to implement indirect jumps).
There is no
distinction between memory space and register space because the RAM serves the
job of both memory and registers, and the RAM is usually just referred to as
the register file or simply as the registers.
PICs have a set of
registers that function as general purpose RAM. Special purpose control
registers for on-chip hardware resources are also mapped into the data space.
The addressability of memory varies depending on device series, and all PIC
devices have some banking mechanism to extend
addressing to additional memory. Later series of devices feature move
instructions which can cover the whole addressable space, independent of the selected
bank. In earlier devices, any register move had to be achieved via the
accumulator.
To implement indirect
addressing, a "file select register" (FSR) and "indirect
register" (INDF) are used. A register number is written to the FSR, after
which reads from or writes to INDF will actually be to or from the register
pointed to by FSR. Later devices extended this concept with post- and pre-
increment/decrement for greater efficiency in accessing sequentially stored
data. This also allows FSR to be treated almost like a stack pointer (SP).
External data memory
is not directly addressable except in some high pin count PIC18 devices.
Code space
The code space is
generally implemented as ROM, EPROM or flash ROM. In general,
external code memory is not directly addressable due to the lack of an external
memory interface. The exceptions are PIC17 and select high pin count PIC18
devices.[7]
Word size
All PICs handle (and
address) data in 8-bit chunks. However, the unit of addressability of the code
space is not generally the same as the data space. For example, PICs in the
baseline (PIC12) and mid-range (PIC16) families have program memory addressable
in the same wordsize as the instruction width, i.e. 12 or 14 bits respectively.
In contrast, in the PIC18 series, the program memory is addressed in 8-bit
increments (bytes), which differs from the instruction width of 16 bits.
In order to be clear,
the program memory capacity is usually stated in number of (single word) instructions,
rather than in bytes.
Stacks
PICs have a
hardware call stack, which is used to save return
addresses. The hardware stack is not software accessible on earlier devices,
but this changed with the 18 series devices.
Hardware support for
a general purpose parameter stack was lacking in early series, but this greatly
improved in the 18 series, making the 18 series architecture more friendly to
high level language compilers.
Instruction set
A PIC's instructions
vary from about 35 instructions for the low-end PICs to over 80 instructions
for the high-end PICs. The instruction set includes instructions to perform a
variety of operations on registers directly, the accumulator and a literal constant or the
accumulator and a register, as well as for conditional execution,
and program branching.
Some operations, such
as bit setting and testing, can be performed on any numbered register, but
bi-operand arithmetic operations always involve W (the accumulator), writing
the result back to either W or the other operand register. To load a constant,
it is necessary to load it into W before it can be moved into another register.
On the older cores, all register moves needed to pass through W, but this
changed on the "high end" cores.
PIC cores have skip
instructions which are used for conditional execution and branching. The skip
instructions are 'skip if bit set' and 'skip if bit not set'. Because cores
before PIC18 had only unconditional branch instructions, conditional jumps are
implemented by a conditional skip (with the opposite condition) followed by an
unconditional branch. Skips are also of utility for conditional execution of
any immediate single following instruction. It is possible to skip skip
instructions. For example, the instruction sequence "skip if A; skip if B;
C" will execute C if A is true or if B is false.
The 18 series
implemented shadow registers which save several important registers during an
interrupt, providing hardware support for automatically saving processor state
when servicing interrupts.
In general, PIC
instructions fall into 5 classes:
1.
Operation on working register (WREG) with 8-bit immediate
("literal") operand. E.g. movlw (move literal
to WREG), andlw (AND literal with WREG). One instruction peculiar to the PIC
isretlw, load immediate into WREG and return, which is used with
computed branches to
produce lookup tables.
2.
Operation with WREG and indexed register. The result can be
written to either the Working register (e.g. addwf reg,w). or the selected
register (e.g. addwf reg,f).
3.
Bit operations. These take a register number and a bit number, and
perform one of 4 actions: set or clear a bit, and test and skip on set/clear.
The latter are used to perform conditional branches. The usual ALU status flags
are available in a numbered register so operations such as "branch on
carry clear" are possible.
4.
Control transfers. Other than the skip instructions previously
mentioned, there are only two: goto and call.
5.
A few miscellaneous zero-operand instructions, such as return from
subroutine, and sleep to enter low-power mode.
Performance
The architectural
decisions are directed at the maximization of speed-to-cost ratio. The PIC
architecture was among the first scalar CPU designs,[citation needed] and
is still among the simplest and cheapest. The Harvard architecture—in which
instructions and data come from separate sources—simplifies timing and
microcircuit design greatly, and this benefits clock speed, price, and power
consumption.
The PIC instruction
set is suited to implementation of fast lookup tables in the program space.
Such lookups take one instruction and two instruction cycles. Many functions
can be modeled in this way. Optimization is facilitated by the relatively large
program space of the PIC (e.g. 4096 × 14-bit words on the 16F690) and by the
design of the instruction set, which allows for embedded constants. For
example, a branch instruction's target may be indexed by W, and execute a
"RETLW" which does as it is named - return with literal in W.
Interrupt latency is
constant at three instruction cycles. External interrupts have to be
synchronized with the four clock instruction cycle, otherwise there can be a
one instruction cycle jitter. Internal interrupts are already synchronized. The
constant interrupt latency allows PICs to achieve interrupt driven low jitter
timing sequences. An example of this is a video sync pulse generator. This is
no longer true in the newest PIC models, because they have a synchronous
interrupt latency of three or four cycles.
Advantages
·
Small instruction set to learn
·
Built in oscillator with selectable speeds
·
Easy entry level, in circuit programming plus in circuit
debugging PICKit units available for less than $50
·
Inexpensive microcontrollers
·
Wide range of interfaces including I²C, SPI, USB, USART, A/D, programmable comparators, PWM, LIN, CAN, PSP, and Ethernet[8]
·
Availability of processors in DIL package make them easy to handle for hobby use.
Limitations
·
Register-bank switching is required to
access the entire RAM of many devices
·
Operations and registers are not orthogonal; some instructions can address RAM
and/or immediate constants,
while others can only use the accumulator
The following stack
limitations have been addressed in the PIC18 series, but still
apply to earlier cores:
·
The hardware call stack is not addressable, so preemptive task switching cannot be implemented
With paged program
memory, there are two page sizes to worry about: one for CALL and GOTO and
another for computed GOTO (typically used for table lookups). For example, on
PIC16, CALL and GOTO have 11 bits of addressing, so the page size is 2048
instruction words. For computed GOTOs, where you add to PCL, the page size is
256 instruction words. In both cases, the upper address bits are provided by
the PCLATH register. This register must be changed every time control transfers
between pages. PCLATH must also be preserved by any interrupt handler.[9]
Compiler development
While several
commercial compilers are available, in 2008, Microchip released their own C
compilers, C18 and C30, for the line of 18F 24F and 30/33F processors.
The easy to learn
RISC instruction set of the PIC assembly language code can make the overall
flow difficult to comprehend. Judicious use of simple macros can increase
the readability of PIC assembly language. For example, the original Parallax PIC assembler
("SPASM") has macros which hide W and make the PIC look like a
two-address machine. It has macro instructions like "mov b, a" (move the data
from address a to address b) and "add b, a" (add data from
address a to data in address b). It also hides the
skip instructions by providing three operand branch macro instructions such as
"cjne a, b, dest" (compare a with b and
jump to dest if they are not equal).
Family core
architectural differences
PICmicro chips have a
Harvard architecture, and instruction words are unusual sizes. Originally,
12-bit instructions included 5 address bits to specify the memory operand, and
9-bit branch destinations. Later revisions added opcode bits, allowing
additional address bits.
Baseline core devices (12 bit)
These devices feature
a 12-bit wide code memory, a 32-byte register file, and a tiny two level deep
call stack. They are represented by the PIC10 series, as well as by some PIC12
and PIC16 devices. Baseline devices are available in 6-pin to 40-pin packages.
Generally the first 7
to 9 bytes of the register file are special-purpose registers, and the
remaining bytes are general purpose RAM. Pointers are implemented using a
register pair: after writing an address to the FSR (file select register), the
INDF (indirect f) register becomes an alias for the addressed register. If
banked RAM is implemented, the bank number is selected by the high 3 bits of
the FSR. This affects register numbers 16–31; registers 0–15 are global and not
affected by the bank select bits.
Because of the very
limited register space (5 bits), 4 rarely read registers were not assigned
addresses, but written by special instructions (OPTION and TRIS).
The ROM address space
is 512 words (12 bits each), which may be extended to 2048 words by
banking. CALL and GOTO instructions
specify the low 9 bits of the new code location; additional high-order bits are
taken from the status register. Note that a CALL instruction only includes 8
bits of address, and may only specify addresses in the first half of each
512-word page.
Lookup tables are
implemented using a computed GOTO (assignment to
PCL register) into a table of RETLW instructions.
The instruction set
is as follows. Register numbers are referred to as "f", while
constants are referred to as "k". Bit numbers (0–7) are selected by
"b". The "d" bit selects the destination: 0 indicates W,
while 1 indicates that the result is written back to source register f. The C
and Z status flags may be set based on the result; otherwise they are
unmodified. Add and subtract (but not rotate) instructions that set C also set
the DC (digit carry) flag, the carry from bit 3 to bit 4, which is useful
for BCD arithmetic.
PIC32 32-bit microcontrollers
In November 2007
Microchip introduced the new PIC32MX family of
32-bit microcontrollers. The initial device line-up is based on the industry
standard MIPS32 M4K Core.[18] The device can
be programmed using the Microchip MPLAB C
Compiler for PIC32 MCUs, a variant of the GCC compiler. The
first 18 models currently in production (PIC32MX3xx and PIC32MX4xx) are pin to
pin compatible and share the same peripherals set with the PIC24FxxGA0xx family
of (16-bit) devices allowing the use of common libraries, software and hardware
tools. Today starting at 28 pin in small QFN packages up to high performance
devices with Ethernet, CAN and USB OTG, full family range of mid-range 32-bit
microcontrollers are available.
The PIC32
architecture brings a number of new features to Microchip portfolio, including:
·
The highest execution speed 80 MIPS (120+[19] Dhrystone MIPS @ 80 MHz)
·
The largest flash memory: 512 kByte
·
One instruction per clock cycle execution
·
The first cached processor
·
Allows execution from RAM
·
Full Speed Host/Dual Role and OTG USB capabilities
·
Full JTAG and 2 wire programming and debugging
·
Real-time trace
Device variants and
hardware features
PIC devices generally
feature:
·
Sleep mode (power savings).
·
Various crystal or RC oscillator
configurations, or an external clock.
Variants
Within a series,
there are still many device variants depending on what hardware resources the
chip features.
·
Internal clock oscillators.
·
8/16/32 Bit Timers.
·
Synchronous/Asynchronous Serial Interface USART.
·
MSSP Peripheral for I²C and SPI Communications.
·
Capture/Compare and PWM modules.
·
External memory interface.
·
Integrated analog RF front ends (PIC16F639, and rfPIC).
·
KEELOQ Rolling code encryption peripheral (encode/decode)
·
And many more.
Trends
The first generation
of PICs with EPROM storage are almost completely replaced by chips with Flash memory. Likewise, the
original 12-bit instruction set of the PIC1650 and its direct descendants has
been superseded by 14-bit and 16-bit instruction sets. Microchip still sells
OTP (one-time-programmable) and windowed (UV-erasable) versions of some of its
EPROM based PICs for legacy support or volume orders. The Microchip website
lists PICs that are not electrically erasable as OTP. UV erasable windowed
versions of these chips can be ordered.
Part number suffixes
The F in a name
generally indicates the PICmicro uses flash memory and can be erased
electronically. Conversely, a C generally means it can only be erased by
exposing the die to ultraviolet light (which is only possible if a windowed
package style is used). An exception to this rule is the PIC16C84 which uses
EEPROM and is therefore electrically erasable.
An L in the name
indicates the part will run at a lower voltage, often with frequency limits
imposed.[20]
Parts designed
specifically for low voltage operation, within a strict range of 3 - 3.6 volts,
are marked with a J in the part number. These parts are also uniquely I/O
tolerant as they will accept up to 5 V as inputs.[20]
PIC clones
Third party
manufacturers make compatible products, for example the Parallax SX.
Microchip provides
a freeware IDE package called MPLAB, which includes an
assembler, linker, software simulator, and debugger. They
also sell C compilers for the PIC18 and dsPIC which integrate cleanly with
MPLAB. Free student versions of the C compilers are also available with all
features. But for the free versions, optimizations will be disabled after 60
days.[21]
Several third parties
make C language compilers for PICs, many
of which integrate to MPLAB and/or feature their own IDE. A fully featured
compiler for the PICBASIC language to program PIC microcontrollers is available
from meLabs, Inc. Mikroelektronika offers
PIC compilers in C, Basic and Pascal programming languages.
A graphical
programming language, Flowcode, exists capable
of programming 8 and 16 bit PIC devices and generating PIC compatible C code.
It exists in numerous versions from a free demonstration to a more complete
professional edition.
The only opensource
compiler for the PIC16 and PIC18 family is the SDCC. It make use of GPutils for
linker and assembler tools. A plugin is needed to install them in MPLAB or
MPLABX.[22]
Development tools are
available for the PIC family under the GPL or other free software or open
source licenses.
Devices called "programmers" are traditionally used to get
program code into the target PIC. Most PICs that Microchip currently sell
feature ICSP (In Circuit
Serial Programming) and/or LVP (Low Voltage Programming)
capabilities, allowing the PIC to be programmed while it is sitting in the
target circuit. ICSP programming is performed using
two pins, clock and data, while a high voltage (12V) is present on the Vpp/MCLR
pin. Low voltage programming dispenses with the high voltage, but reserves exclusive
use of an I/O pin and can therefore be disabled to recover the pin for other
uses (once disabled it can only be re-enabled using high voltage programming).
There are many
programmers for PIC microcontrollers, ranging from the extremely simple designs
which rely on ICSP to allow direct download of code from a host computer, to
intelligent programmers that can verify the device at several supply voltages.
Many of these complex programmers use a pre-programmed PIC themselves to send
the programming commands to the PIC that is to be programmed. The intelligent
type of programmer is needed to program earlier PIC models (mostly EPROM type)
which do not support in-circuit programming.
Many of the higher
end flash based PICs can also self-program (write to their own program memory).
Demo boards are available with a small bootloader factory programmed that can
be used to load user programs over an interface such as RS-232 or USB, thus obviating the need for a programmer device. Alternatively
there is bootloader firmware available that the user can load onto the PIC
using ICSP. The advantages of a bootloader over ICSP is the far superior
programming speeds, immediate program execution following programming, and the
ability to both debug and program using the same cable.
Programmers/debuggers
are available directly from Microchip. Third party programmers range from plans
to build your own, to self-assembly kits and fully tested ready-to-go units.
Some are simple designs which require a PC to do the low-level programming
signalling (these typically connect to the serial or parallel port and consist of
a few simple components), while others have the programming logic built into
them (these typically use a serial or USB connection, are usually faster, and
are often built using PICs themselves for control).
The following are the
official PICkit programmer/debuggers from Microchip:
Microchip PICkit1
Microchip PICkit2
Microchip PICkit3
PICKit 2 clones and open source
PICKit 2 has been an
interesting PIC programmer from Microchip. It can program all PICs and debug
most of the PICs (as of May-2009, only the PIC32 family is not supported for
MPLAB debugging). Ever since its first releases, all software source code (firmware,
PC application) and hardware schematic are open to the public. This makes it
relatively easy for an end user to modify the programmer for use with a
non-Windows operating system such as Linux or Mac OS. In the mean time, it also
creates lots of DIY interest and clones. This open source structure brings many
features to the PICKit 2 community such as Programmer-to-Go, the UART Tool and
the Logic Tool, which have been contributed by PICKit 2 users. Users have also
added such features to the PICKit 2 as 4MB Programmer-to-go capability, USB
buck/boost circuits, RJ12 type connectors and others.
Software emulation
Commercial and free
emulators exist for the PIC family processors.
In-circuit debugging
Later model PICs
feature an ICD (in-circuit debugging) interface, built into the CPU core. ICD
debuggers (MPLAB ICD2 and other third party) can communicate with this
interface using three lines. This cheap and simple debugging system comes at a
price however, namely limited breakpoint count (1 on older pics 3 on newer
PICs), loss of some IO (with the exception of some surface mount 44-pin PICs
which have dedicated lines for debugging) and loss of some features of the
chip. For small PICs, where the loss of IO caused by this method would be
unacceptable, special headers are made which are fitted with PICs that have
extra pins specifically for debugging.
In-circuit emulators
Microchip offers
three full in-circuit emulators: the MPLAB ICE2000 (parallel
interface, a USB converter is available); the newer MPLAB ICE4000 (USB 2.0
connection); and most recently, the REAL ICE. All of these ICE tools can be
used with the MPLAB IDE for full source-level debugging of code running on the
target.
The ICE2000 requires
emulator modules, and the test hardware must provide a socket which can take
either an emulator module, or a production device.
The REAL ICE connects
directly to production devices which support in-circuit emulation through the
PGC/PGD programming interface, or through a high speed connection which uses
two more pins. According to Microchip, it supports "most" flash-based
PIC, PIC24, and dsPIC processors.[
The ICE4000 is no
longer directly advertised on Microchip's website, and the purchasing page
states that it is not recommended for new designs.
Reference:
- http://ww1.microchip.com/downloads/en/DeviceDoc/39630C.pdf
- http://www.datasheetarchive.com/dl/Databooks-1/Book241-407.pdf
- "PICmicro Family
Tree", PIC16F Seminar Presentation
- "MOS DATA
1976", General Instrument 1976 Databook
- "1977 Data Catalog",
Micro Electronics from General Instrument Corporationhttp://www.rhoent.com/pic16xx.pdf
- http://ww1.microchip.com/downloads/en/DeviceDoc/35007b.pdf
- "AN869:
External Memory Interfacing Techniques for the PIC18F8XXX".
Retrieved 24 August 2009.
- Microchip
Product Selector
- "PIC
Paging and PCLATH"
- PIC10F200/202/204/206
Data Sheet. Microchip Technology. 2007.
p. 52.
- http://www.emc.com.tw/eng/products.asp
- ELAN Microelectronics Corp.
(September 2005), EM78P157N
8-bit microcontroller with OTP ROM Product Specification,
retrieved 2012-04-02
- http://www.microchipc.com/sourcecode/
- Microchip Technology, Inc.
(2007), PIC18F1220/1320
Data Sheet, retrieved 2012-04-02
- Jump
up^ [1]
- "PIC24H
Family Overview". Retrieved 23 September
2007.
- dsPIC30F
Programmer's Reference Manual, Microchip
Technology, 2008, DS70157C, retrieved 2012-07-02
- http://www.mips.com/products/processors/32-64-bit-cores/mips32-m4k/
- "32-bit
PIC MCUs". Retrieved 13 October 2010.
- "3V
Design Center". Retrieved 2 August 2011.
- "MPLAB
C Compiler for PIC18 MCUs".
- "SDCC
plugin for MPLABX".
- "MPLAB
REAL ICE In-Circuit Emulator Product Overview".
Retrieved 23 September 2007.
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